GNSS(Global Navigation Satellite System) is the system to find the exact position of the target on the ground by using the satellite such as GPS(Global Positioning System), Galileo, GLONASS(Global Navigation Satellite System). Especially, GPS was originally developed for the defense of the United Sates in the early 1970s. Recently, GPS is not limited to utilization in the field of military aviation, due to the large demands of the mobile communication network, civilian positioning system. However, due to GPS signal come from satellites 20,000km away, the received signal strength on the ground is inherently so weak, GPS satellite signal is vulnerable to interfere such as jamming. Many anti-jamming techniques for Global Navigation Satellite System including GPS have been developed recently. One of the techniques is the digital signal processing in frequency domain such as overwrapped FFT, adaptive Filter. In order to process baseband signal in good quality, it needs ADC over 14bit with low clock jitter and high dynamic-range RF circuit. In this paper, we propose a high dynamic-range RF ASIC architecture for anti-jam device named ISU (Interference Suppression Unit). Legacy ISU device had digital baseband chipset, RF Amplifier and down conversion mixer, multi-bit ADC, frequency synthesizer and RF up conversion mixer. The RF ASIC we proposed has high dynamic-range RF front-end, multi-band frequency synthesizer and high speed 14-bit ADC that was fabricated in a standard 0.18????m CMOS technology for minimizing RF part of ISU.

Keywords: GNSS, anti-jam, RF front-end ASIC